3.2.6.6.3 GPIO Distribution

The SAMA7G54-EK features one QuickSwitch 2:1 multiplexer to distribute the MPU PIOs.

The multiplexer distributes the PIOs according to the J3 status:

  • J3 is open (default mode): the Ethernet 10/100 interface is distributed.
  • J3 is closed: the PDMC0 interface is distributed.
Figure 3-25. GPIO Distribution Schematic
Table 3-12. GPIO Assignments
PIO MPU Net Name Device Net Name Function
PD22 PD22 ETH1_TX0_PD22 Transmit data line 0
PDMC0_CLK_PD22 PDM clock line
PD23 PD23 ETH1_TX1_PD23 Transmit data line 1
PDMC0_DS0_PD23 PDM data line 0
PD24 PD24 ETH1_CRSDV_PD24 Receive data valid or carrier sense and data valid
PDMC0_DS1_PD24 PDM data line 1