10.2 Interrupt Vector Mapping
Each interrupt vector is connected to one peripheral instance, as shown in the table below. A peripheral can have one or more interrupt sources. For more details on the available interrupt sources, see the Interrupt section in the Functional Description of the respective peripheral.
An interrupt flag is set in the peripheral's interrupt flag (<peripheral>.INTFLAGS) register when the interrupt condition occurs, even if the interrupt is not enabled.
By writing to the corresponding Interrupt Enable bit in the peripheral's Interrupt Control (<peripheral>.INTCTRL) register, an interrupt is enabled or disabled.
An interrupt request is generated when the corresponding interrupt is enabled, and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral's interrupt flag (<peripheral>.INTFLAGS) register for details on how to clear interrupt flags.
| Vector Number | Program Address (word) | Peripheral Source (Name) | Description | 14-pin | 20-pin | 28-pin | 32-pin |
|---|---|---|---|---|---|---|---|
| 0 | 0x00 | RESET | X | X | X | X | |
| 1 | 0x02 | NMI | Non-Maskable interrupt available for CRCSCAN | X | X | X | X |
| 2 | 0x04 | BOD_VLM | Voltage Level Monitor | X | X | X | X |
| 3 | 0x06 | RTC_CNT | Overflow / compare match | X | X | X | X |
| 4 | 0x08 | RTC_PIT | Periodic interrupt | X | X | X | X |
| 5 | 0x0A | CCL_CCL | Configurable Custom Logic | X | X | X | X |
| 6 | 0x0C | PORTA_PORT | External interrupt | X | X | X | X |
| 7 | 0x0E | WEX0 | Fault detect | X | X | X | X |
| 8 | 0x10 | TCE0_OVF | Overflow | X | X | X | X |
| 9 | 0x12 | TCE0_CMP0 | Compare Channel 0 | X | X | X | X |
| 10 | 0x14 | TCE0_CMP1 | Compare Channel 1 | X | X | X | X |
| 11 | 0x16 | TCE0_CMP2 | Compare Channel 2 | X | X | X | X |
| 12 | 0x18 | TCE0_CMP3 | Compare Channel 3 | X | X | X | X |
| 13 | 0x1A | TCB0_INT | Capture / Overflow | X | X | X | X |
| 14 | 0x1C | TCB1_INT | Capture / Overflow | X | X | X | X |
| 15 | 0x1E | TWI0_TWIC | Client | X | X | X | X |
| 16 | 0x20 | TWI0_TWIH | Host | X | X | X | X |
| 17 | 0x22 | SPI0_INT | Serial Peripheral Interface 0 | X | X | X | X |
| 18 | 0x24 | USART0_RXC | Receive complete | X | X | X | X |
| 19 | 0x26 | USART0_DRE | Data register empty | X | X | X | X |
| 20 | 0x28 | USART0_TXC | Transmit complete | X | X | X | X |
| 21 | 0x2A | PORTD_PORT | External interrupt | X | X | X | X |
| 22 | 0x2C | TCF0_INT | Compare / Overflow | X | X | X | X |
| 23 | 0x2E | AC0_AC | Compare | X | X | X | X |
| 24 | 0x30 | ADC0_ERROR | Error | X | X | X | X |
| 25 | 0x32 | ADC0_RESRDY | Result ready | X | X | X | X |
| 26 | 0x34 | ADC0_SAMPRDY | Sample ready | X | X | X | X |
| 27 | 0x36 | AC1_AC | Compare | X | X | X | X |
| 28 | 0x38 | PORTC_PORT | External interrupt | X | X | X | X |
| 29 | 0x3A | PORTF_PORT | External interrupt | X | X | X | X |
| 30 | 0x3C | NVMCTRL_NVMREADY | EEPROM / Flash ready | X | X | X | X |