12.3.2 Main Clock Selection and Prescaler

All available oscillators and the external clock (EXTCLK) can be used as the main clock source for the Main Clock (CLK_MAIN). The main clock source is selectable from software and can safely be changed during ordinary operation.

The Configuration Change Protection mechanism prevents unsafe clock switching. For more details, refer to the Configuration Change Protection section.

When selecting an external clock source, a switch to the chosen clock source will occur if a sufficient number of edges are detected. If enough number of clock edges are not detected, the clock source remains unchanged, and it is impossible to change to another clock source without executing a Reset.

The Main Clock Oscillator Changing (SOSC) bit in the Main Clock Status (CLKCTRL.MCLKSTATUS) register indicates an ongoing clock source switch. The stability of the external clock sources is indicated by the respective Status (EXTS and XOSC32KS) bits in CLKCTRL.MCLKSTATUS.

CAUTION: If an external clock source fails while used as the CLK_MAIN source, only the Watchdog Timer (WDT) can provide a System Reset.

The CLK_MAIN is fed into the prescaler before being used by the peripherals (CLK_PER) in the device. The prescaler divides CLK_MAIN by a factor from 1 to 256 (with PBDIV).

Figure 12-2. Main Clock and Prescaler