25.2.1 Block Diagram

Figure 25-1. Timer/Counter Type F Block Diagram

The timer/counter can be clocked from multiple clock sources, including the Peripheral Clock (CLK_PER), internal oscillators, and Event System (EVSYS).

Figure 25-2. Timer/Counter Clock Logic

The Clock Select (CLKSEL) bit field in the Control C (TCFn.CTRLC) register selects one of the clock sources used as an input for the prescaler.

By using the EVSYS, any event source, such as an external clock signal on any I/O pin, may be used as the counter clock input. In addition, the timer/counter can be controlled via the event system.