7.4.1 Current Consumption
The following table provides the current consumption values of the transceiver.
| 
                             Mode/Parameter  | MCU Mode | Transceiver Conditions | Measured Current (Typical) | Units | 
|---|---|---|---|---|
| TX mode(3) | ACTIVE | TX; North American band, fRF = 915 MHz, TX power setting = 20, PA = ON | 114.68 | mA | 
| TX; North American band, fRF = 915 MHz, TX power setting = 17, PA = ON | 93.64 | |||
| TX; North American band, fRF = 915 MHz, TX power setting = 15, PA = OFF | 38.44 | |||
| TX; North American band, fRF = 915 MHz, TX power setting = 7, PA = OFF | 25.24 | |||
| TX; European band, fRF = 868 MHz, TX power setting = 15, PA = OFF | 41.54 | |||
| TX; European band, fRF = 868 MHz, TX power setting = 7, PA = OFF | 25.68 | |||
| RX mode | ACTIVE | RX; North American band, fRF = 915 MHz, Bandwidth = 125 kHz | 12.64 | mA | 
| RX; North American band, fRF = 915 MHz, Bandwidth = 250 kHz | 13.34 | |||
| RX; European band, fRF = 868 MHz, Bandwidth = 125 kHz | 12.68 | |||
| RX; European band, fRF = 868 MHz, Bandwidth = 250 kHz | 13.36 | |||
| Low power modes | Standby | Sleep | 1.608 | µA | 
| Backup | Sleep | 642 | nA | 
Note: 
                
        - This parameter is characterized but not tested in manufacturing.
 - The following are the typical conditions for the measurement:
- Operating
                                    Conditions:
- VDD = 3.3V and Temperature at 25°C
 - CPU is running on Flash with two Wait states in PL2
 - Low power cache is enabled and BOD33 (Brown-out detector on On-chip Switching mode regulator output (VSWOUT)/battery input voltage (VBAT) is disabled
 - Transceiver conditions as specified in the table
 
 - Oscillators:
- XOSC (crystal oscillator) is disabled
 - When MCU is in Active Performance Level 2 (PL2) mode, the DFLL48M is running at 48 MHz in Open-Loop mode
 
 - Clocks:
- In the PL2 mode, DFLL48M is running in the Open-Loop mode and is used as the main clock source
 - The clock masks and dividers are at Reset values: All AHB and APB clocks are enabled, CPUDIV = 1, BUPDIV = 1 and LPDIV = 1
 - I/Os are configured in the Digital Functionality Disabled mode. Except for PA04 and PA05, which are used to provide the UART input to the device
 
 
 - Operating
                                    Conditions:
 - RF output is terminated with 50Ω when the module is transmitting a Continuous Wave (CW) tone
 
