15.2 Power Modes

To minimize power consumption, the PIC32CX-BZ2 incorporates a PMU that provides both DC-DC (Buck) and LDO power conversion. The input voltage range to the PMU is 1.9V to 3.6V – VDD (main). On power-up, the PIC32CX-BZ2 operates in LDO mode; the software must enable the DC-DC Buck converter.

See Electrical Characteristics from Related Links for detailed electrical information.

The power modes and power management features provided by the PMU are shown in the following table.

Table 15-1. Power Modes and Power Management Features
FunctionsDevice Power Modes
RunIdleDream1Sleep(Standby)Deep Sleep(Backup)eXtreme Deep Sleep(Off)
CPUOnClock GatedClock GatedClock GatedOffOff
PeripheralsOnOnOn DemandClock GatedOffOff
FlashOnOnOn DemandClock GatedOffOff
Core System MemoryOnOnOn DemandRetention ModeOffOff
RadioOnOnOn DemandClock GatedOffOff
DSWDTOnOnOnOnOnOff
RTCCOnOnOnOnOnOff
Backup RAMOnOnOn DemandRetention ModeRetention ModeOff
XTAL(16 MHz)OnOnOnOnOffOff
SPLLOnOnOn DemandOffOffOff
ADCOnOnOn DemandOn DemandOffOff
Analog CompOnOnOn DemandOn DemandOffOff
FRCOnOnOn DemandOffOffOff
LPRCOnOnOnOnOnOn
Note:
  1. Dream (Sleep Walking) is not a mode by itself but is a companion mode to the Sleep mode. This mode cannot be entered directly through a software command.

Current consumption can be reduced on peripherals/modules in "On" state by clock gating and/or disabling the module, see Module Enable/Disable Controls in the Register Description from Related Links. All transitions from the Run state to any of the low power states is simply initiated by WFI command from the CPU. However, prior to initiating the WFI command.

The software performs the following actions:
  • Disabling all interrupts
  • Setting up the DSCON[DSEN], OSCCON[SLPEN], OSCCON[DRMEN] and Wireless Subsystem Sleep mode Controls
  • Set the Wireless Subsystem into the Low Power mode
  • Enable the appropriate wake-up events
  • Checking for any pending interrupts and, if present, abort deep sleep and service the interrupt
  • If no pending interrupts, then issue a SLEEP/WAIT command from the CPU to get into the appropriate Low Power mode

In the Run mode, the CPU is actively executing code. Run mode provides normal operation of the processor and all peripherals that are currently enabled.

In the Idle mode, all active peripherals can be clocked, but the CPU core is clock gated off and no code is executed.

In the Dream mode (or Sleep Walking mode), the CPU is clock gated but peripherals can be turned on on-demand by events related to those peripherals. No code is executed.

In the Sleep and Deep Sleep modes, the backup RAM is in retention mode, while the CPU and most peripherals are clock gated off and no code is executed.

In the eXtreme Deep Sleep mode, only the Low Power RC oscillator is enabled. Exiting Deep sleep/XDS is equivalent to Power-on Reset. The RCON register provides the status whether it is a normal power up or exiting from deep sleep/XDS.
Note: All desired register/configuration inputs (for example, DSZPBOREN, DSWDTPS ) to be preserved must be set to expected values before setting DSCON.DSEN = 1; failure to do so would result in faulty configuration fault indications.

The low power mode entry and exit commands and wake up resources are shown in the following table.

Table 15-2. Low Power Mode Entry and Exit commands and Wake-up Resources
Device Power ModesEntry CommandsWake-up Resources
Run——
IdleWFI Instruction + ~OSCCON[SLPEN]IRQ, Reset, Others(1)
DreamOSCCON[DREAM] + Event + Sleep modeIRQ, Reset, Others
Sleep~DSCON[DSEN]+OSCCON[SLPEN]+Wireless Sleep followed by WFI IRQ, Reset, Others
Deep SleepDSCON[DSEN]+ {RTCC (Enabled) or DSWDT (Enabled)} + Wireless Sleep followed by WFIINT0, RTCC, DSWDT(2), Reset
eXtreme Deep SleepDSCON[DSEN]+ {RTCC (Disabled) and DSWDT (Disabled)} + Wireless Sleep followed by WFIINT0, Reset
Note:
  1. Others = System Wake-up (Dream), WDT (Timeout Event), DMT (Timeout Event), PLVD Event, PMU Event, External NMI/INT, DSU/ICD Debug Event, CPU Debug Event.
  2. To enable the Deep Sleep Mode Watchdog Timer(DSWDT) in deep sleep mode, Configuration Control Register 4(CFGCON4). DSWDT is a separate timer from the device's watchdog timer that is used in run mode. The device Watchdog Timer (WDT) does not have to be enabled for the DSWDT to function.
  3. For more information, see DSCON register from Related Links.