6.2.7.3 Remappable Input Example

For example, the following figure illustrates the remappable pin selection for the EXTINT0 input. To remap the EXTINT0 input to a particular pin, the EXTINT0R remap register must be programmed. EXTINT0 is in group 1; therefore, it can be mapped to any pin that is in group 1 (RPA3, RPA7, RPA9, RPA11, RPB0, RPB4, RPB8 and so on).

To map it to RPB0, program the value 4 (4’b0100) into the EXINTR0R SFR register. See the following Input Pin Selection Group 1 table.

Figure 6-2. EXTINT0 Remappable Pin Selection

Note: For input only, the PPS functionality does not have priority over the TRISx settings. Therefore, when configuring the RPn pin for input, the corresponding bit in the TRISx register must also be configured for input (set to ‘1’).

Table 6-2. Input Pin Selection Group 1
Peripheral Pin	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT0	EXTINT0R	EXTINT0[3:0]	0000 = OFF 0001 = RPA3 0010 = RPA7 0011 = RPA11 0100 = RPB0 0101 = RPB4 0110 = RPB8 0111 = RPB12 1000 = RPA2 1001 = RPA6 1010 = RPA10 1011 = RPA14 1100 = RPB3 1101 = RPB7 1110 = RPB11 1111 = RPA9
SERCOM0_PAD3	SCOM0P3R	SCOM0P3R[3:0]
SERCOM1_PAD2	SCOM1P2R	SCOM1P2R[3:0]
SERCOM2_PAD1	SCOM2P1R	SCOM2P1R[3:0]
SERCOM3_PAD0	SCOM3P0R	SCOM3P0R[3:0]
QSCK	QSCKR	QSCKR[3:0]
QD1	QD1R	QD1R[3:0]
REFI	REFIR	REFIR[3:0]
CCLIN0	CCLIN0R	CCLIN0R[3:0]
CCLIN3	CCLIN3R	CCLIN3R[3:0]
TC0_WO0G1	TC0WO0G1R	TC0WO0G1R[3:0]
TC1_WO0G1	TC1WO0G1R	TC1WO0G1R[3:0]
TC2_WO0G1	TC2WO0G1R	TC2WO0G1R[3:0]
TC3_WO0G1	TC3WO0G1R	TC3WO0G1R[3:0]

Table 6-3. *Input Pin Selection Group 2*
Peripheral Pin	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT1	EXTINT1R	EXTINT1R[3:0]	0000 = OFF 0001 = RPA4 0010 = RPA8 0011 = RPA12 0100 = RPB1 0101 = RPB5 0110 = RPB9 0111 = RPB13 1000 = RPA3 1001 = RPA7 1010 = RPA11 1011 = RPB0 1100 = RPB4 1101 = RPB8 1110 = RPB12 1111 = RPA0
SERCOM0_PAD0	SCOM0P0R	SCOM0P0R[3:0]
SERCOM1_PAD3	SCOM1P3R	SCOM1P3R[3:0]
SERCOM2_PAD2	SCOM2P2R	SCOM2P2R[3:0]
SERCOM3_PAD1	SCOM3P1R	SCOM3P1R[3:0]
QD2	QD2R	QD2R[3:0]
CCLIN1	CCLIN1R	CCLIN1R[3:0]
CCLIN4	CCLIN4R	CCLIN4R[3:0]
TC0_WO0G2	TC0WO0G2R	TC0WO0G2R[3:0]
TC1_WO1G2	TC1WO1G2R	TC1WO1G2R[3:0]
TC2_WO1G2	TC2WO1G1R	TC2WO1G1R[3:0]
TC3_WO1G2	TC3WO1G1R	TC3WO1G1R[3:0]

Table 6-4. *Input Pin Selection Group 3*
Peripheral Pin	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT2	EXTINT2R	EXTINT2R[3:0]	0000 = OFF 0001 = RPA5 0010 = RPA9 0011 = RPA13 0100 = RPB2 0101 = RPB6 0110 = RPB10 0111 = RPA0 1000 = RPA4 1001 = RPA8 1010 = RPA12 1011 = RPB1 1100 = RPB5 1101 = RPB9 1110 = RPB13 1111 = RPA1
SERCOM0_PAD1	SCOM0P1R	SCOM0P1R[3:0]
SERCOM1_PAD0	SCOM1P0R	SCOM1P0R[3:0]
SERCOM2_PAD3	SCOM2P3R	SCOM2P3R[3:0]
SERCOM3_PAD2	SCOM3P2R	SCOM3P2R[3:0]
QD3	QD3R	QD3R[3:0]
CCLIN2	CCLIN2R	CCLIN2R[3:0]
CCLIN5	CCLIN5R	CCLIN5R[3:0]
TC0_WO1G3	TC0WO1G3R	TC0WO1G3R[3:0]
TC2_WO0G3	TC2WO0G3R	TC2WO0G3R[3:0]
TC3_WO0G3	TC3WO0G3R	TC3WO0G3R[3:0]

Table 6-5. *Input Pin Selection Group 4*
Peripheral Pin	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT3	EXTINT3R	EXTINT3R[3:0]	0000 = OFF 0001 = RPA6 0010 =RPA10 0011 = RPA14 0100 = RPB3 0101 =RPB7 0110 = RPB11 0111 = RPA1 1000 = RPA5 1001 = RPA9 1010 = RPA13 1011 = RPB2 1100 = RPB6 1101 = RPB10 1110 = RPA8 1111 = RPA2
NMI	NMIR	NMIR[3:0]
SERCOM0_PAD2	SCOM0P2R	SCOM0P2R[3:0]
SERCOM1_PAD1	SCOM1P1R	SCOM1P1R[3:0]
SERCOM2_PAD0	SCOM2P0R	SCOM2P0R[3:0]
SERCOM3_PAD3	SCOM3P3R	SCOM3P3R[3:0]
QD0	QD0R	QD0R[3:0]
TC0_WO1G4	TC0WO1G4R	TC0WO1G4R[3:0]
TC2_WO1G4	TC2WO1G4R	TC2WO1G4R[3:0]
TC3_WO1G4	TC3WO1G4R	TC3WO1G4R[3:0]