11.10.2 Cache Configuration
Name: | CFG |
Offset: | 0x04 |
Reset: | 0x00000020 |
Property: | R/W |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CSIZESW[2:0] | DCDIS | ICDIS | |||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 1 | 0 | 0 | 0 |
Bits 6:4 – CSIZESW[2:0] Cache Size Configured by Software
Value | Name | Description |
---|---|---|
0x0 | CONF_CSIZE_1KB | The Cache Size is configured to 1KB |
0x1 | CONF_CSIZE_2KB | The Cache Size is configured to 2KB |
0x2 | CONF_CSIZE_4KB | The Cache Size is configured to 4KB |
0x3 | CONF_CSIZE_8KB | The Cache Size is configured to 8KB |
0x4 | CONF_CSIZE_16KB | The Cache Size is configured to 16KB |
0x5 | CONF_CSIZE_32KB | The Cache Size is configured to 32KB |
0x6 | CONF_CSIZE_64KB | The Cache Size is configured to 64KB |
0x7 | Reserved |
Bit 2 – DCDIS Data Cache Disable
Writing a ‘0
’ to this bit enables data caching.
Writing a ‘1
’ to this bit disables data caching.
Bit 1 – ICDIS Instruction Cache Disable
Writing a ‘0
’ to this bit enables instruction caching.
Writing a ‘1
’ to this bit disables instruction caching.