47.6.6 TDM Reception and Transmission Sequence
In Time Division Multiplexed (TDM) format, one to eight data words are sent or received within each frame. As specified in the I2S protocol, data bits are left-justified in the channel time slot, with the MSB transmitted first, starting one clock period after the transition on the word select line. Each time slot is 32 bits long.
Data bits are sent on the falling edge of the serial clock and sampled on the rising edge of the serial clock. The I2SMCC_WS pin provides a frame synchronization signal, starting one I2SMCC_CK period before the MSB of channel 0.
The TDM format is selected when I2SMCC_MRA.FORMAT=2.
The TDM Left-Justified format is selected when I2SMCC_MRA.FORMAT=3.
The Frame Synchronization pulse can be either one I2SMCC_CK period, 16-bit I2SMCC_CK period (half time slot) or one 32-bit time slot. This selection is done by writing the I2SMCC_MRA.TDMFS bit.
The number of channels is selected by writing the I2SMCC_MRA.NBCHAN field.
The Frame Synchronization pulse set to 32-bit time slot with the number of channel set to 1 configuration is not supported.
The length of transmitted words can be chosen among 8, 16, 18, 20, 24, and 32 bits by writing the I2SMCC_MRA.DATALENGTH field.
If the time slot allows for more data bits than programmed in the I2SMCC_MRA.DATALENGTH field, zeroes are appended to the transmitted data word or extra received bits are discarded.