25.5.9 ICE Access Prevention

The DBGU allows blockage of access to the system through the Arm processor's ICE interface. This feature is implemented via the Force NTRST register (DBGU_FNR), that allows assertion of the NTRST signal of the ICE interface. Writing the bit FNTRST (Force NTRST) to 1 in this register prevents any activity on the TAP controller.

Note:

During ROM code execution, this bit is set (JTAG access is disabled).
This bit has no more effect once the JTAG access is disabled in the OTPC.

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