28.5.1 Control A
| Name: | CTRLA |
| Offset: | 0x00 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RUNSTDBY | ENABLE | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 6 – RUNSTDBY Run in Standby
This bit indicates if the peripheral clock (CLK_PER) is kept running in Standby sleep mode. The setting is ignored for configurations where the CLK_PER is not required. For details refer to 28.3.4 Sleep Mode Operation.
| Value | Description |
|---|---|
| 0 | System clock is not required in standby sleep mode. |
| 1 | System clock is required in standby sleep mode. |
Bit 0 – ENABLE Enable
| Value | Description |
|---|---|
| 0 | The peripheral is disabled. |
| 1 | The peripheral is enabled. |