23.11.7 Clock Selection
| Name: | CLKSEL |
| Offset: | 0x07 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKSEL[1:0] | |||||||||
| Access | R | R | R | R | R | R | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 1:0 – CLKSEL[1:0] Clock Select
Writing these bits selects the source for the RTC clock (CLK_RTC).
When configuring the RTC to use either XOSC32K or the external clock on TOSC1, XOSC32K needs to be enabled and the Source Select bit (SEL) and Run Standby bit (RUNSTDBY) in the XOSC32K Control A register of the Clock Controller (CLKCTRL.XOSC32KCTRLA) must be configured accordingly.
| Value | Description |
|---|---|
| 0x0 | 32KHz from OSCULP32K |
| 0x1 | 1KHz from OSCULP32K |
| 0x2 | 32.768kHz from XOSC32K |
| 0x3 | External clock from TOSC1 pin |