36.16 ADC

Table 36-22. Power Supply, Reference and Input Range
Operating conditions:
  • VDD = 3.0V
  • TA = 25°C
  • Applies for all allowed combinations of VREF selections and sample rates unless otherwise specified
  • Characteristics are identical with and without PGA enabled unless otherwise specified
SymbolDescriptionMin.Typ.✝Max.UnitConditions
VDDSupply voltage1.8—5.5V
VREFReference voltage1.024—VDDV
CINInput capacitance—2.5—pFPGA disabled
—7—PGA enabled
RINInput resistance—3—kΩPGA disabled
—2.5—kΩPGA enabled
VINInput voltage range0—VREFVSingle-Ended mode
-0.1—VDD + 0.1Differential mode

✝ Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V . These parameters are not tested and are for design guidance only.

Table 36-23. Clock and Timing Characteristics
Operating conditions:
  • VDD = 3.0V
  • TA = 25°C
  • Applies for all allowed combinations of VREF selections and sample rates unless otherwise specified
  • Characteristics are identical with and without PGA enabled unless otherwise specified
SymbolDescriptionMin.Typ.✝Max.UnitConditions
CLK_ADCADC clock frequency300—2000kHzREFSEL = Internal Reference
300—6000

REFSEL = External Reference

REFSEL = VDD

✝ Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V . These parameters are not tested and are for design guidance only.

Table 36-24. Accuracy Characteristics
Operating conditions:
  • VDD = 3.0V
  • VREF = External 2.048V
  • TA = 25°C
  • fCLK_ADC = 2.5 MHz
  • Differential mode
  • CPU in Idle sleep mode
SymbolDescriptionMin.Typ.✝Max.UnitConditions
ResResolution——12bit
EINLIntegral nonlinearity(1)-2.30.8+2.3LSb
EDNLDifferential nonlinearity(1)-0.90.8+1.6
EOFFOffset error-151.5+15PGA disabled
EGAINGain error—0.6—PGA disabled
ETTotal unadjusted error—5—PGA disabled

✝ Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V . These parameters are not tested and are for design guidance only.

Note:
  1. Unless indicated otherwise, the linearity characteristics stay identical regardless of whether the PGA is activated.
Table 36-25. PGA Characteristics
Operating conditions:
  • VDD = 3.0V
  • -40°C ≤ TA ≤ 125°C
SymbolDescriptionMin.Typ.✝Max.UnitConditions
NRMSInput noise—32—µVRMSPGA Gain = 1V/V
—63—PGA Gain = 2V/V
—125—PGA Gain = 4V/V
—250—PGA Gain = 8V/V
—500—PGA Gain = 16V/V
EGAINGain error —-0.2—%PGA Gain = 1V/V
—-0.2—PGA Gain = 2V/V
—-0.3—PGA Gain = 4V/V
—-0.6—PGA Gain = 8V/V
—-0.8—PGA Gain = 16V/V

✝ Data in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.