Libero® SoC v2022.2

9.7 Timing Exceptions Overview

Use timing exceptions to overwrite the default behavior of the design path.

Timing exceptions include:

Setting multicycle constraint to specify paths that (by design) will take more than one cycle.
Setting a false path constraint to identify paths that must not be included in the timing analysis or the optimization flow.
Setting a maximum/minimum delay constraint on specific paths to relax or to tighten the original clock constraint requirement.

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