8.1 Current Address Read

The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address remains valid between operations as long as the V_CC is maintained to the part. The address rollover during a read is from the last byte of the last page to the first byte of the first page of the memory.

A current address read operation outputs data according to the location of the internal data word address counter. This is initiated with a Start condition, followed by a valid device address byte with the R/W bit set to logic ‘1’. The device will ACK this sequence, and the current address data word is serially clocked out on the SDA line. All types of read operations will terminate if the bus host does not respond with an ACK (it NACKs) during the ninth clock cycle. After the NACK response, the host may send a Stop condition to complete the protocol, or it can send a Start condition to begin the next sequence.

While the two most significant bits of the data word address (A17 and A16) are embedded in the Device Address byte, they do not take precedence over the existing values of the A17 and A16 bits in the internal address counter during a Current Address Read and are therefore represented as don’t care bits, as shown in Figure 8-1.