6.1 Device Addressing

Accessing the device requires an 8-bit device address byte following a Start condition to enable the device for read or write operations. Since multiple client devices can reside on the serial bus, each client device must have its own unique address so the host can access each device independently.

The Most Significant four bits of the device address byte are referred to as the device type identifier. The device type identifier ‘1010’ (Ah) for the main EEPROM access and ‘0110’ (6h) for the Write-Protect registers access is required in bits 7 through 4 of the device address byte (see Table 6-1).

Following the 4-bit device type identifier are the hardware client address bits, A2, A1 and A0. These bits can be used to expand the address space by allowing up to eight Serial EEPROM devices on the same bus. These hardware client address bits must correlate with the voltage level on the corresponding hardwired device address input pins A0, A1 and A2. These pins use an internal proprietary circuit that automatically biases the pin to a logic ‘0’ state if the pin is allowed to float. To operate in a wide variety of application environments, the pull‑down mechanism is intentionally designed to be somewhat strong. Once the pin is biased above the CMOS input buffer’s trip point (~0.5 x VCC), the pull-down mechanism disengages. Microchip recommends connecting the A0, A1 and A2 pins to a known state whenever possible.

The eighth bit (bit 0) of the device address byte is the Read/Write Select bit. A read operation is initiated if this bit is high, and a write operation is initiated if this bit is low.

Upon the successful comparison of the device address byte, the AT34C02D will return an ACK. If a valid comparison is not made, the device will NACK. The device will NACK if the Write-Protect register has been programmed and the device type identifier is '0110' (6h).

Table 6-1. Device Address Byte
Access AreaBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
EEPROM1010A2A1A0R/W
Write-Protect Registers 0 110A2A1A0R/W

For all operations except the current address read, a word address byte must be transmitted to the device immediately following the device address byte. The word address byte contains an 8-bit memory array word address and is used to specify which byte location in the EEPROM where reading or writing should commence. Refer to Table 6-2 to review these bit positions.

Table 6-2. Word Address Byte
Access AreaBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
EEPROMA7A6A5A4A3A2A1A0
Write-Protect Registers X XXXXXXX
Note: X indicates a “don’t care” bit.