30.8.7 STATUS - Status Register
| Name: | STATUS |
| Offset: | 0x0B |
| Reset: | 0x00 |
| Property: | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OVF | BUSY | ||||||||
| Access | R/W | R | |||||||
| Reset | 0 | 0 |
Bit 1 – OVF Sticky Count Value Overflow
This bit is cleared by writing a ‘1’ to it.
This bit is set when an overflow condition occurs to the value counter.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the OVF status.
Clearing the CTRLA.ENABLE register bit will clear the OVF bit.
Bit 0 – BUSY FREQM Status
Note: If the measurement clock stalls (or
is very slow) during a measurement slot, the STATUS.BUSY will never de-assert and
the DONE interrupt will not be raised.
| Value | Description |
|---|---|
| 0 | No ongoing frequency measurement. |
| 1 |
Frequency measurement is ongoing. |