10.2 Ethernet Interface

The SAMA7D65 SOM Series embeds one low-power, single-port triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical layer transceiver (PHY) LAN8840, optimized for precision process timing.

The LAN8840T-V/PSA supports industry-standard RGMII (Reduced Gigabit Media Independent Interface) providing chip-to-chip connection to a host device with an integrated Gigabit Ethernet MAC.

The LAN8840T-V/PSA is connected to a small size 25-MHz crystal used to generate its internal subsystem clocks.

The device is available in a 7 mm × 7 mm 48-pin VQFN Package and is implemented in the system as shown in the figure below.

For more information, refer to the Ethernet PHY LAN8840 data sheet (see Reference Documents).

Figure 10-1. Ethernet PHY Digital/Analog Block Diagram
The SAMA7D65 SOM Series embeds straps on the MODE[4:0] signals of the LAN8840 pins (PB3, PB6, PB2, PA30, PA29) to ensure that a set of features is configured automatically when the GMAC_NRST signal (pin 99) is released. The default settings are as follows.
  • Auto-negotiation to automatically select the highest link-up speed and duplex: Enabled
  • Automatic MDI/MDI-X crossover to detect and correct pair swap at all speeds of operation: Enabled
  • Energy Efficient Ethernet (EEE) support: Enabled
  • Single port with triple-speed (10BASE-T/100BASE-TX/1000BASE-T) link in full-duplex modes: Enabled
The LAN8840 PHY is not fully configured. Configuration straps (pull-up/down resistors) on the GMAC_LEDx pads (pins 100, 101, 102, 103 and 104) must be placed outside the module, and the GMAC_NRST signal (pin 99) can be connected as follows.
  • The GMAC_LED5_ALLPHYAD pad (pin 104) allows the use of any value on the GMAC_LEDx_PHYAD[2:0] pads (pins 102, 101, 100), or 0 by default. This pin can be pulled up or down externally.
  • The GMAC_LEDx_PHYAD[2:0] pads (pins 102, 101, 100) are used to set the PHY address.
  • The GMAC_NRST pad can be connected to the global NRST signal (pin 173), to the microprocessor reset output NRST_OUT signal (pin 174), or to any system reset management.
Note: Any required external pulling configuration strap must be tied to either VDD_3V3 or GND, depending on customer needs. For more details, refer to the LAN8840 data sheet (see Reference Documents).