2.8 SRAM Checkerboard Test

Test Name: SRAM Test with Checkerboard Algorithm.

Acceptable Measure (Annex. H): Static Memory Test (H.2.19.6)

Purpose of test: Detect stuck bits and coupling faults in SRAM and on the data bus, as well as any addressing problems.

Description: The internal SRAM is used for volatile storage of data and any faults related to this can be catastrophic for the appliance control. The 0x55 and 0xAA are written into alternate memory locations of the cell array in a checkerboard pattern. The algorithm divides the cells into two alternate groups such that every neighboring cell is in a different group.

• CheckerBoard algorithm is executed in below 4 steps:
  • Step-1: Write checkerboard with up addressing order
  • Step-2: Read checkerboard with up addressing order
  • Step-3: Write inverse checkerboard with up addressing order
  • Step-4: Read inverse checkerboard with up addressing order

API Documentation: SRAM Checkerboard Diagnostic Test