8.2.5 Protection Region n Start Address Offset Register

Legend: x = Loaded from Configuration bits, R = Readable bit, W= Writable bit

Note:
  1. Register is read-only unless RTYPE[1:0] bits are ‘11’ and LOCK[1:0] bits (PRLOCK[1:0]) are ‘11’. Firmware configurable region descriptors are locked (read-only) at Reset and must be unlocked with a write to PRLOCK before being modified.
  2. Start address offset is a first byte offset from the beginning of the user program Flash (0x800000 address).
  3. Start value is loaded from Configuration Words.
Name: PRnST
Offset: 0x304, 0x314, 0x324, 0x334, 0x344, 0x354, 0x364, 0x374

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
  START[22:16]  
Access R/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxx 
Bit 15141312111098 
 START[15:12] START[11:0] 
Access R/WR/WR/WR/WRRRR 
Reset xxxx0000 
Bit 76543210 
 START[11:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 22:12 – START[22:12]  Most Significant bits of the Protection Region First Byte Address Offset bits(1,2,3)

Bits 11:0 – START[11:0] Least Significant bits of the Protection Region First Byte Address Offset bits. This portion is read only and is fixed value 0x000.