8.1.3 Interfacing in SPI Mode

Four FLEXCOM interfaces configured in SPI mode are available on the SAM9X60D1G-I/LZB.

FLEXCOM offers several serial communication protocols that are managed by the USART, SPI and TWI submodules.

The Serial Peripheral Interface (SPI) circuit is a synchronous serial data link that provides communication with external devices in Host or Client mode. It also enables communication between processors if an external processor is connected to the system.

The Serial Peripheral Interface is essentially a shift register that serially transmits data bits to other SPI devices. During a data transfer, one SPI system acts as the “host,” which controls the data flow, while the other devices act as “clients,” which have data shifted in and out by the host. Different CPUs can take turns being hosts (multiple host protocol, as opposed to single host protocol, where one CPU is always the host while all others are always clients). One host can simultaneously shift data into multiple clients. However, only one client can drive its output to write data back to the host at any given time.

A client device is selected when the host asserts its NSS signal. When multiple client devices are available, the host generates a separate client select signal (NPCS) for each.

The SPI system consists of two data lines and two control lines:

• Host Out Client In (MOSI)—This data line supplies the output data from the host shifted into the input(s) of the client(s).
• Host In Client Out (MISO)—This data line supplies the output data from a client to the input of the host. There may be no more than one client transmitting data during any particular transfer.
• Serial Clock (SPCK)—This control line is driven by the host and regulates the flow of the data bits. The host can transmit data at a variety of baud rates; there is one SPCK pulse for each bit transmitted.
• Client Select (NSS)—This control line allows clients to be turned on and off by hardware.