5.2 Power-Up/Down Considerations

At power-up, from a power supply sequencing perspective, the SAM9X60D1G-I/LZB power supplies are categorized into five independent groups:
  • 5V_MAIN (main supply)
  • VDDBU (backup group)
  • VDD_3V3 (periphery group) containing VDDUTMII, VDDANA, VDDOSC, VDDNF, VDDIOPx and VDDQSPI inputs
  • VDDIOM (memory group)
  • VDDCORE (core group)

The figure below shows the recommended power-up sequence. Note the following:

  • VDDBU
    • When supplied from a precharged storage element (battery, supercapacitor or micro-battery), VDDBU is an always-on supply input and is therefore not part of the power supply sequencing.
    • When no storage element is used on VDDBU in the application, VDDBU must be tied to VDD_3V3.
    • When a supercapacitor or a micro-battery is used in the application to power VDDBU in Backup mode, this element must be isolated from VDDBU during its (slow) charge, so that VDDBU closely follows VDD_3V3. In table Power-Up Timing Specification, the parameter t1 limits the delay to establish VDDBU after VDD_3V3.
  • VDDOUT25 is the output of the internal 2.5V regulator, and therefore there is no power supply requirement on this pin. VDDOUT25 is automatically started at VDD_3V3 rise when VDD_3V3 is above its Power-On-Reset threshold.
Figure 5-2. Recommended Power-Up Sequence
Table 5-2. Power-Up Timing Requirements
Symbol Parameter Conditions2 Min Typ Max Unit
t0 nSTRT deglitch time nSTRT pin falling edge 0.5 – – ms
t1 VDDBU delay Delay from established VDD_3V3 to established VDDBU – – 0.2 ms
t2 VDD_3V3 to Periphery group delay Delay from established VDD_3V3 to the periphery group established supply – 8 – ms
t3 Periphery group to VDDCORE delay Delay from the periphery group established supply to the VDDCORE supply turn-on – 4 – ms
t4 Reset delay at power-up From established VDDCORE to NRST high – 16 – ms
Note:
  1. If VDDQSPI is supplied externally, the power must be applied at the same time or after the presence of VDD_3V3 and before the presence of VDDIOM.
  2. The term "established" refers to a power supply established to 90% of its final value.

The following figure shows the SAM9X60D1G-I/LZB power-down sequence that starts by asserting the NRST line to 0.

Once NRST is asserted, the supply inputs can be immediately shut down without any specific timing or order. VDDBU may not be shut down if the application uses a backup storage element on this supply input.

Figure 5-3. Recommended Power-Down Sequence
Table 5-3. Power-Down Timing Requirements
Symbol Parameter Conditions Min Typ Max Unit
t5 NRST delay at power-down Delay from NRST asserted to first supply turn-off 0 – 10 µs