24.9 Register Summary - Mode 1 - 16-Bit Counter


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	7:0					MODE[1:0]		ENABLE	SWRST
0x00	CTRLA	15:8	COUNTSYNC				PRESCALER[3:0]
0x02 ... 0x03	Reserved
0x04	EVCTRL	7:0	PEREO7	PEREO6	PEREO5	PEREO4	PEREO3	PEREO2	PEREO1	PEREO0
		15:8	OVFEO						CMPEO1	CMPEO0
		23:16
		31:24
0x08	INTENCLR	7:0	PER7	PER6	PER5	PER4	PER3	PER2	PER1	PER0
0x08	INTENCLR	15:8	OVF						CMP1	CMP0
0x0A	INTENSET	7:0	PER7	PER6	PER5	PER4	PER3	PER2	PER1	PER0
0x0A	INTENSET	15:8	OVF						CMP1	CMP0
0x0C	INTFLAG	7:0	PER7	PER6	PER5	PER4	PER3	PER2	PER1	PER0
0x0C	INTFLAG	15:8	OVF						CMP1	CMP0
0x0E	DBGCTRL	7:0								DBGRUN
0x0F	Reserved
0x10	SYNCBUSY	7:0		COMP1	COMP0	PER	COUNT	FREQCORR	ENABLE	SWRST
		15:8	COUNTSYNC
		23:16
		31:24
0x14	FREQCORR	7:0	SIGN	VALUE[6:0]
0x15 ... 0x17	Reserved
0x18	COUNT	7:0	COUNT[7:0]
0x18	COUNT	15:8	COUNT[15:8]
0x1A ... 0x1B	Reserved
0x1C	PER	7:0	PER[7:0]
0x1C	PER	15:8	PER[15:8]
0x1E ... 0x1F	Reserved
0x20	COMP0	7:0	COMP[7:0]
0x20	COMP0	15:8	COMP[15:8]
0x22	COMP1	7:0	COMP[7:0]
0x22	COMP1	15:8	COMP[15:8]