10.4.3 Sleep Mode Operation

If the system is in a sleep mode where the Generic Clocks are stopped, a peripheral that needs its clock in order to execute a process must first request it from the Generic Clock Controller.

The Generic Clock Controller receives this request, determines which Generic Clock Generator is involved, and which clock source needs to be awakened. It then wakes up the respective clock source, enables the Generator and Peripheral Channel stages successively, and delivers the clock to the peripheral.

The Run In Standby bit in the Generator Control register (GENCTRL[n].RUNSTDBY) controls clock output to the pin during Standby sleep mode. If the bit is cleared, the Generator output is not available on the pin. When set, GCLK can continuously output the generator signal to the GCLK_IO[n] pin. Refer to the External Clock section for details.

The following table identifies when a Clock Generator is off in Standby mode, minimizing the power consumption:
Table 10-7. Clock Generator n Activity in Standby Mode
Request for Clock n presentGENCTRL[n].RUNSTDBYGENCTRL[n].OEClock Generator n
Yes--Active
No00Off
No01Off
No10Off
No11Active

A delay may occur when the device is put into Standby sleep mode before the power is turned off. This delay is caused by running clock Generators: if the RUNSTDBY bit in the GENCTRL[n] register is '0', GCLK must verify that the clock is turned off. The duration of this verification depends on the clock frequency.

For additional information, refer to the PM - Power Manager section.