10.4.2.5 Generic Clock After Reset
GCLK will provide a default clock after a Device Reset. This means that both a clock source and a generator need to be configured and enabled automatically as the device starts up again.
The following table shows the Generator Control register (GENCTRL[n]) value after a Device Reset:
| GCLK Generator | Reset Value after a Device Reset |
|---|---|
| Generator 0 |
0x00000105
|
| All other Generators | 0x00000000 |
The following table shows the Peripheral Channel Control registers (PCHCTRL[n]) and the function of the Write Lock bit (WRTLOCK) after a Device Reset:
| Reset | WRTLOCK (before reset) | PCHCTRLm.GEN | PCHCTRLm.CHEN | WRTLOCK (after reset) |
|---|---|---|---|---|
| Power Reset |
0
|
0x0
|
0x0
|
0x0
|
1
|
0x0
|
0x0
|
0x0
| |
| User Reset |
0
|
0x0
|
0x0
| No change |
1
| No change | No change | No change |
Refer to the PCHCTRL[n] register for details on the values after reset and which bits and bit fields are affected.
