6.4.1 Boot ROM Operation at Startup

The Boot ROM operation at startup can be logically divided into the following functional stages:
  1. Integrity Check of the Program Flash Memory (Optional)

    If the CRCBOOT bit in the User Configuration (BOOTCFG.USERCFG) fuse is set, the Boot ROM will perform a CRC-32 scan on the Program Flash Memory. If any integrity violation is detected, the Boot ROM halts further execution, reports the error in the DSU.BCC registers(1), and places the device into a known safe state called Interactive mode (IMODE)(2). Otherwise, the Boot ROM proceeds to the next stage.

  2. Debugger Probe Detection

    The Boot ROM is designed to asynchronously accept a cold-plug-in request from the debugger (i.e. SWD host) at any time during the device's operating life cycle. The Boot ROM automatically detects debugger attachement to the device as soon as the debugger follows the cold-plug-in sequence. Refer to the DSU - Device Service Unit chapter and the Programming Specifications section in this chapter for details on debugger operation.

  3. Application of User Settings and Finalization

    Applies user-selected fuse configurations to the respective peripherals. Refer to the BOOTCFG - Boot Configuration Fuses chapter for more details.

    At the end of the boot process, the OSCHF at 4 MHz is selected as the default clock for GCLK0 and, consequently, MCLK. See the chapters on the Clock System, GCLK, MCLK for details.

  4. Transition to First Mutable Application Executable

    Transfers control to the first mutable application executable by loading the PC and SP values only if the boot operation is successful. Refer to the Product Mapping and Memories chapters for details.

Note:
  1. If the Boot External Notification I/O Pin (BOOT_GPIOSEL) fuse in the BOOTCFG memory section is written, a fault signal is asserted on the configured pin.
  2. When no debugger probe is detected after entering IMODE, the device will reset.