5.5.1.4 BOD Configuration Fuse
| Name: | BODCFG |
| Offset: | 0x018 |
| Reset: | 0xFFFFFFFF |
| Property: | R/W |
The bit group values of this fuse are written to the corresponding bit groups of the BOD VDD Control (BODVDD) register in the Supply Controller (SUPC) at start-up.
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WRTLOCK | VLMCFG[1:0] | VLMLVL[1:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 1 | 1 | 1 | 1 | 1 | ||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| LEVEL[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 1 | 1 | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SAMPFREQ | ACTCFG | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 1 | 1 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RUNSTDBY | STDBYCFG | ENABLE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 1 | 1 | 1 |
Bit 31 – WRTLOCK Write Lock
This bit value is loaded into the WRTLOCK bit in the SUPC.BODVDD register during Reset. Refer to the SUPC - Supply Controller chapter for further details.
| Value | Description |
|---|---|
| 0x0 | The BODVDD configuration is not locked |
| 0x1 | The BODVDD configuration is locked |
Bits 27:26 – VLMCFG[1:0] Voltage Level Monitor Interrupt Configuration
This bit value is loaded into the VLMCFG bit in the SUPC.BODVDD register during Reset. Refer to the SUPC - Supply Controller chapter for further details.
| Value | Name | Description |
|---|---|---|
| 0x0 | FALLING | VDD falls below VLM threshold |
| 0x1 | RISING | VDD rises above VLM threshold |
| 0x2 | BOTH | VDD crosses VLM threshold |
Bits 25:24 – VLMLVL[1:0] Voltage Level Monitor Level
This bit field value is loaded into the VLMLVL bit in the SUPC.BODVDD register during Reset. Refer to the SUPC - Supply Controller chapter for further details.
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | VLM disabled |
| 0x1 | 5ABOVE | VLM threshold is 5% above BOD threshold |
| 0x2 | 15ABOVE | VLM threshold is 15% above BOD threshold |
| 0x3 | 25ABOVE | VLM threshold is 25% above BOD threshold |
Bits 17:16 – LEVEL[1:0] BOD Level
- Refer to the BOD and POR Characteristics in the Electrical Characteristics section for further details.
- Values in the description are typical values.
| Value | Name | Description |
|---|---|---|
| 0x0 | BODLEVEL0 | 1.90V |
| 0x1 | BODLEVEL1 | 2.45V |
| 0x2 | BODLEVEL2 | 2.70V |
| 0x3 | BODLEVEL3 | 2.85V |
Bit 12 – SAMPFREQ BOD Sampling Frequency
| Value | Name | Description |
|---|---|---|
| 0 | 128HZ | The sample frequency is 128 Hz |
| 1 | 32HZ | The sample frequency is 32 Hz |
Bit 8 – ACTCFG BOD Operation Mode in Active Mode
| Value | Name | Description |
|---|---|---|
| 0 | ENABLE | In active mode, the BOD operates in continuous mode |
| 1 | SAMPLE | In active mode, the BOD operates in sampling mode |
Bit 6 – RUNSTDBY Run in Standby
This bit value is loaded into the RUNSTDBY bit in the SUPC.BODVDD register during Reset. Refer to the SUPC - Supply Controller chapter for further details.
| Value | Description |
|---|---|
| 0x0 | The BOD is not running in Standby sleep mode |
| 0x1 | The BOD is running in Standby sleep mode if enabled by the ENABLE bit |
Bit 5 – STDBYCFG BOD Configuration in Standby Sleep Mode
This bit value is loaded into the STDBYCFG bit in the SUPC.BODVDD register during Reset. Refer to the SUPC - Supply Controller chapter for further details.
| Value | Name | Description |
|---|---|---|
| 0x0 | CONT | In Standby sleep mode, the BOD is configured in continuous mode |
| 0x1 | SAMP | In Standby sleep mode, the BOD is configured in sampling mode |
Bit 1 – ENABLE BOD Enable
| Value | Name | Description |
|---|---|---|
| 0 | DISABLE | BOD is disabled |
| 1 | ENABLE | BOD is enabled |
