10.6.3 Peripheral Channel Control n
| Name: | PCHCTRL[n] |
| Offset: | 0x80 + n*0x04 [n=0..12] |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WRTLOCK | CHEN | GEN[3:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bit 7 – WRTLOCK Write Lock
0’ to this bit will set the Peripheral Channel register
(PCHCTRL[n]) and the associated Generator register (GENCTRL[n]) to an unlocked
state.Writing a '
1' to this bit will cause future writes to the
PCHCTRL[n] register to be discarded. The control register of the corresponding
Generator m (GENCTRL[m]), as assigned by the Generator Select (GEN) bit field of the
Peripheral Control (PCHCTRL[n]) register, will also be locked. It can only be
unlocked by a Device Reset.
Note: Generator 0 (GENCTRL[0]) cannot be locked.
| Value | Description |
|---|---|
| 0 | The Peripheral Channel register and the associated Generator register are not locked |
| 1 | The Peripheral Channel register and the associated Generator register are locked |
Bit 6 – CHEN Channel Enable
Note: This bit requires synchronization.
When writing to this bit, its value must be polled (read back and checked against '
expected value) to ensurethat synchronization is complete.
| Value | Description |
|---|---|
| 0 | The Peripheral Channel is disabled |
| 1 | The Peripheral Channel is enabled |
Bits 3:0 – GEN[3:0] Generator Selection
A Device Reset will reset all the PCHCTRL[n] registers.
Note: Refer to the Peripheral Clocks
section for details on the peripheral channels and their corresponding peripheral
instances available on the device (PCHCTRL[n] mapping).
| Value | Name | Description |
|---|---|---|
| 0x0 | GCLK0 | Generic Clock Generator 0 |
| 0x1 | GCLK1 | Generic Clock Generator 1 |
| 0x2 | GCLK2 | Generic Clock Generator 2 |
| 0x3 | GCLK3 | Generic Clock Generator 3 |
