14.4.4.1 Idle Sleep Mode

The Idle sleep mode allows power optimization with the fastest wake-up time.

The CPU is stopped.

The clock source feeding the GCLK generator 0, the GCLK generator 0, and the MCLK are kept active. The AHB/APB clocks are gated at the MCLK output, unless requested by a peripheral.

Other clock sources and GCLK generators may be running or stopped depending on the ONDEMAND bit of each clock source and whether any peripherals are requesting these clocks.

• Entering Idle sleep mode: The Idle sleep mode is entered by setting SLEEPCFG.SLEEPMODE to IDLE and by executing the Wait For Interrupt (WFI) instruction. Additionally, if the SLEEPONEXIT bit in the ARM Cortex System Control (SCR) register is set, the Idle sleep mode will also be entered when the CPU exits the lowest priority interrupt service routine (ISR). This feature is useful for applications that only require the processor to run when an interrupt occurs. Before entering Idle sleep mode, the Sleep Configuration (SLEEPCFG) register must be properly configured.
• Exiting Idle sleep mode: The processor wakes the system when it detects any non-masked interrupt with sufficient priority to cause exception entry. The system returns to the Active mode. The CPU and affected peripherals are restarted.