14.4.4.2 Standby Sleep Mode

The Standby sleep mode is the minimum power configuration, preserving the state of the logic and the contents of the SRAM.

This mode depends on:
  • The peripherals running in standby and requesting their asynchronous GCLK clock or their synchronous AHB/APB clock
  • The RUNSTDBY bit of the GCLK generators
  • The RUNSTDBY/ONDEMAND bit combination of the clock sources
Each clock source and GCLK generator can be:
  • Stopped for the entire duration of standby
  • Running for the entire duration of standby
  • Clock sources and GCLK generators can be automatically woken up and switched off depending on the clocks requested by peripherals during standby (SleepWalking). For example, a peripheral can run during standby and request its GCLK asynchronous clock, which will wake up the related GCLK and clock source. Another peripheral may request its APB clock, which will wake up the MCLK, GCLK generator 0 and the related clock source running. In this case, other AHB/APB clocks remain gated at the MCLK output.

As described above, depending on the configuration, the device’s current consumption in Standby sleep mode may vary slightly.

All features that don’t require CPU intervention are supported in Standby sleep mode. Here are some examples:
  • Autonomous peripherals features
  • Features that use the event system for autonomous communication between peripherals
  • Features that rely on on-demand clock
  • DMA transfers

Entering Standby sleep mode: This mode is entered by setting SLEEPCFG.SLEEPMODE to STANDBY and executing the WFI instruction. The SLEEPONEXIT feature is also available in Standby sleep mode, as in Idle mode.

Exiting Standby sleep mode: Any peripheral capable of generating an asynchronous interrupt can wake up the system. For example, a peripheral running on a GCLK clock can trigger an interrupt. When an enabled asynchronous wake-up event occurs and the system is awakened, the device will either execute the interrupt service routine or resume the normal program execution, depending on the configuration of the Priority Mask (PRIMASK) register in the CPU. The system can also be awakened by a synchronous interrupt from any peripheral configured to run in the Standby sleep mode.