13.4.4 Sleep Mode Operation

OSC32K Internal 32.768 kHz Oscillator

The OSC32K oscillator’s sleep mode operation is determined by the setting of the ONDEMAND bit in the OSC32KCTRL register.

After a reset, the ONDEMAND bit in the OSC32KCTRL register is automatically set and the OSC32K oscillator is only running if requested by a peripheral. The oscillator will run in any sleep mode as long as it is requested by a peripheral.

If the ONDEMAND bit is written to ‘0’, the oscillator will always run in any sleep mode.

Table 13-1. OSC32K Sleep Behavior
Sleep ModeOSC32KCTRL.ONDEMANDSleep Behavior
Active, Idle, Standby0Always running
1Running if requested by a peripheral

XOSC32K External 32.768 kHz Oscillator

The XOSC32K oscillator’s sleep mode operation is determined by the setting of the ONDEMAND bit in the XOSC32KCTRL register.

After a reset, the XOSC32K oscillator is not enabled and the ONDEMAND bit is set. In order for the oscillator to run, it must first be configured and enabled, and a peripheral must request the oscillator. In this case, the oscillator will run in any sleep mode as long as any peripheral is requesting it.

If the ONDEMAND bit is written to ‘0’, the oscillator will always run as long as it is enabled.

The CFD is halted depending on the configuration of the XOSC32K and the peripheral clock requests. The XOSC32K CLKFAIL interrupt can be used to wake up the device from a sleep mode.

Table 13-2. XOSC32K Sleep Behavior
Sleep Mode

XOSC32KCTRL.

ONDEMAND
XOSC32K and CFD Sleep Behavior
Active, Idle, Standby0Always running
1Running if requested by a peripheral
Note:

If the ENABLE bit in the XOSC32KCTRL register is ‘0’, the XOSC32K oscillator is unavailable.

If the ENABLE bit in the XOSC32KCTRL register is ‘1’, this table is valid.