6.5.6.2.1 Debug Communication Channels

The DSU provides two registers: Debug Communication Channel x (DCC0 and DCC1) for communication and synchronization between the debugger and the CPU. Each register has a corresponding dirty bit, DCCD0 and DCCD1, respectively. These two dirty bits are set on a write and cleared on a read by hardware, and they reside in DSU.STATUSB register.

Customers can use these registers to build their own communication protocol.