29.4.3.9 Start-of-Frame Detection

The USART start-of-frame detector can wake up the CPU when it detects a start bit. For this feature to work, the device must be in Standby sleep mode, the internal fast start-up oscillator must be selected as the GCLK_SERCOMx_CORE source, and the Run Standby bit (CTRLA.RUNSTDBY) must be set to ‘0’.

When a 1-to-0 transition is detected on RxD, the SERCOM requests the Generic Clock (GCLK) and the GCLK_SERCOMx_CORE starts. After start-up, the rest of the data frame can be received, provided that the baud rate is slow enough in relation to the fast start-up internal oscillator start-up time. Refer to the Electrical Characteristics section for details.

The USART start-of-frame detection works both in Asynchronous and Synchronous modes. It is enabled by writing ‘1’ to the Start of Frame Detection Enable bit in the Control B register (CTRLB.SFDE).

If the Receive Start Interrupt Enable bit in the Interrupt Enable Set register (INTENSET.RXS) is set, the Receive Start interrupt is generated immediately when a start is detected.

When using start-of-frame detection without the Receive Start interrupt, start detection requests the GCLK_SERCOMx_CORE to receive the rest of the frame. In this case, the CPU will not wake up until the Receive Complete interrupt is generated.