7.3 Crypto MSS Mode (For PolarFire SoC FPGA Only)

When configured in MSS mode, the User Crypto block is totally disconnected from the fabric interface and connected directly to the MSS switch. In this mode:

1. The Cryptoprocessor is clocked by the MSS PLL at a frequency of 200 MHz.
2. The Cryptoprocessor is connected to MSS AXI switch through asynchronous AXI to AHB and AHB to AXI bridges. The Cryptoprocessor can be used by the MSS processors using CAL driver.
3. The Cryptoprocessor control inputs (GO, PURGE, and so on) are directly controlled by MSS system register bits in normal operation.