7.3.3 SPI Interface Timing
Parameters | Symbol | Min. | Max. | Units |
---|---|---|---|---|
SCK Clock Frequency | fSCK | — | 16 | MHz |
SCK High Time | tWH | 20 | — | ns |
SCK Low Time | tWL | 25 | — | ns |
CS High Time | tCS | 100 | — | ns |
CS Setup Time | tCSS | 100 | — | ns |
CS Hold Time | tCSH | 100 | — | ns |
Data in Setup Time | tSU | 5 | — | ns |
Data in Hold Time | tH | 5 | — | ns |
Input Rise Time(1, 2) | tRI | — | 2 | μs |
Input Fall Time(1, 2) | tFI | — | 2 | μs |
Output Valid | tV | — | 25 | ns |
Output Hold Time | tHO | 0 | — | ns |
Output Disable Time | tDIS | — | 25 | ns |
Note:
- Values are based on characterization and are not production tested.
- System designers must ensure that all AC parametrics are met, which will typically require rise and fall times faster than these values for most clock rates. Ramp rates slower than this may result in improper operation.