5 Electrical Parameters

This section shows the electrical parameters of the SA50-120 Single Series device under the following conditions unless otherwise specified:

Parameter

Output

Conditions

Min

Nom

Max

Units

Input voltage

(Vin)

Note 2

86

120

158

V

Output voltage set point

(VOUT)

28V

IOUT = 100% rated load

27.73

28.00

28.27

V

15V

14.85

15.00

15.15

12V

11.88

12.00

12.12

5V

5.05

5.10

5.15

3.3V

3.27

3.30

3.33

Output voltage adjust

(VADJ)

5

%

Output power

(POUT)

28V

Note 13

In all cases Output power must be kept within Pout rating.

0.5

50

W

15V

50

12V

50

5V

50

3.3V

33

Output current

(IOUT)

28V

0.18

1.8

A

15V

0.33

3.3

12V

0.42

4.2

5V

0.1

10

3.3V

0.1

10

Line regulation

(VRLINE)

28V

VIN = 86 V, 120 V, 158 V IOUT = 10%, 50%, 100% rated Note 12

–56

56

mV

15V

–30

30

12V

–24

24

5V

̶ 10

10

3.3V

–10

10

Load regulation

(VRLOAD)

28V

VIN = 86 V, 120 V, 158 V IOUT = 10%, 50%, 100% rated Note 11

–280

280

mV

15V

–150

150

12V

–120

120

5V

̶ 50

50

3.3V

–50

50

Input current

(IIN)

IOUT=0, pin3 open

10

35

mA

Pin 3 shorted to pin 2

3

5

Output ripple

(VRIP)

28V

VIN = 86 V, 120 V, 158 V IOUT = 100% rated, Note 4

100

280

mV p-p

15V

75

150

12V

60

120

5V

25

50

3.3V

25

50

Switching frequency

(FS)

Sync input (pin 4) open

200

220

240

kHz

Efficiency

(EFF)

28V

IOUT = 100% rated load

79

85

%

15V

79

85

12V

77

83

5V

75

81

3.3V

73

79

Inhibit input

Inhibit input: ON Threshold

Note 1

4.5

V

Inhibit input: OFF (sink)

Note 1

1000

µA

Inhibit input: OFF Threshold

Note 1

2

V

Current limit point

(% rated output)

When VOUT = 90% of nominal set point

105

145

%

Synchronization

frequency range

The external clock on sync input (pin 4)

500

600

kHz

Synchronization pulse-high level

Note 1

4.0

10.0

V

Synchronization pulse-low level

Note 1

–0.5

0.5

V

Synchronization pulse-transition rate

Note 1

200

V/µs

Synchronization pulse-duty cycle

Note 1

10

80

%

Power dissipation, load fault

(PD)

Short circuit, overload

Note 6

24

W

Output response to step load changes

(VTLD)

28V

(50% to/from 100%)

rated load Note 7

–2200

2200

mV peak

15V

–1200

1200

12V

–900

900

5V

–300

300

3.3V

–300

300

Recovery time, step load changes

(TTLD)

(50% to/from 100%)

rated load

Notes 7, 8

200

2000

µs

Output response to step line changes

(VTLN)

28V

86V to/from 158V IOUT = 100% rated load Note 9

–1000

1000

mV peak

15V

–600

600

12V

–480

480

5V

–300

300

3.3V

–300

300

Recovery time, step line changes

(TTLN)

86V to/from 158V IOUT = 100% rated load Notes 8, 9

200

2000

µs

Turn-on response: overshoot

(VOS) (main)

28V

(0% to 100%) rated load Notes 3, 4, 10

2800

mV

15V

1500

12V

1200

5V

500

3.3V

500

Turn-on response: turn-on delay

(TDLY)

Note 10

0.1

10

ms

Capacitive load

(CL)

28V

Note 5

200

µF

15V

350

12V

450

5V

1000

3.3V

1000

Line rejection

DC to 50 kHz, IOUT = 100% rated load

30

60

dB

Isolation

@25°C and 200V

  1. Input (1, 2, 3) to Outputs (7-12)
  2. Sync (4-5) to All (1-3, 6-12)
  3. Chassis (6) to All (1-5, 7-12)

100

Mass

Standard case style A, B

120

g

MTBF

MIL-HDBK-217F2, SF, 35°C

8.22x106

hrs