19.14.9 RxyI2C
I2C Pad Rxy Control Register
Important:
- Refer to the “Pin Allocation Table” for details about pin availability per port
- Unimplemented bits will read back
as ‘
0
’ - I2C pins that are specified as operating in an MVIO voltage domain do not have internal I2C pull-ups implemented. Refer to the device Register Summary for the specific features available in each individual RxyI2C register.
Name: | RxyI2C |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SLEW[1:0] | PU[1:0] | TH[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:6 – SLEW[1:0] I2C Specific Slew Rate Limiting Control
Value | Description |
---|---|
11 | I2C Fast mode Plus (1 MHz) slew rate enabled. The SLRxy bit is ignored. |
10 | Reserved |
01 | I2C Fast mode (400 kHz) slew rate enabled. The SLRxy bit is ignored. |
00 | Standard GPIO Slew Rate; enabled/disabled via the SLRxy bit |
Bits 5:4 – PU[1:0] I2C Pull-Up Selection
Value | Description | |
---|---|---|
FME =
0x |
FME =
10 |
|
11 |
Reserved | 0.9 kΩ - 1.3 kΩ Internal pull-up resistance (recommended for I2C loads in the range of 30 pF - 100 pF)(1) |
10 |
1.9 kΩ - 2.9 kΩ Internal pull-up resistance(1) | 1.5 kΩ - 2.3 kΩ Internal pull-up resistance (recommended for I2C loads in the range of 20 - 50 pF)(1) |
01 |
7 kΩ - 10.4 kΩ Internal pull-up resistance(1) | 3.5 kΩ - 5 kΩ Internal pull-up resistance (recommended for I2C loads in the range of 5 - 20 pF)(1) |
00 |
Standard GPIO weak pull-up, enabled via the WPUxy bit | |
Note:
|
Bits 1:0 – TH[1:0] I2C Input Threshold Selection
Value | Description |
---|---|
11 | SMBus 3.0 (1.35V) input threshold |
10 | SMBus 2.0 (2.1V) input threshold |
01 | I2C-specific input thresholds |
00 | Standard GPIO Input pull-up, enabled via the INLVLxy registers |