19.14.6 INLVLx

Input Level Control Register
Important:
  • Refer to the “Pin Allocation Table” for details about pin availability per port
  • Unimplemented bits will read back as ‘0
  • Any peripheral using the I2C pins read the I2C ST inputs when enabled via RxyI2C

Name: INLVLx

Bit 76543210 
 INLVLx7INLVLx6INLVLx5INLVLx4INLVLx3INLVLx2INLVLx1INLVLx0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – INLVLxn Input Level Select on RX Pin

ValueDescription
1 Schmitt Trigger (ST, CMOS-Compatible) input used for port reads and interrupt-on-change
0 Low-Voltage Buffer (LVBUF, TTL-Compatible) input used for port reads and interrupt-on-change
Refer to the “Pin Allocation Table” for details about pin availability per port Unimplemented bits will read back as ‘0’ Any peripheral using the I2C pins read the I2C ST inputs when enabled via RxyI2C