20.3.13 PORTWCON
Name: | PORTWCON |
Address: | 0x10C |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CLKEN | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit 0 – CLKEN PORTW Clock Enable
Reset States: |
|
Value | Description |
---|---|
1 | Clock input for PORTW is enabled. All PORTW registers are read-only, except LATW which is read/write. |
0 | Clock input for PORTW is disabled. All PORTW registers, including LATW, have read/write access. |