24.8.10 CLCnGLS2
Name: | CLCnGLS2 |
Address: | 0x0DE |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
G3D4T | G3D4N | G3D3T | G3D3N | G3D2T | G3D2N | G3D1T | G3D1N | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | x | x | x | x | x | x | x | x |
Bits 1, 3, 5, 7 – G3DyT dyT: Gate3 Data ‘y’ True (noninverted)
Reset States: |
|
Value | Description |
---|---|
1 | dyT is gated into g3 |
0 | dyT is not gated into g3 |
Bits 0, 2, 4, 6 – G3DyN dyN: Gate3 Data ‘y’ Negated (inverted)
Reset States: |
|
Value | Description |
---|---|
1 | dyN is gated into g3 |
0 | dyN is not gated into g3 |