10.2.1 Overview

The Nested Vectored Interrupt Controller (NVIC) in the SAM D5x/E5x family devices supports 138 interrupts with eight different priority levels. For more details, refer to the Cortex-M4 Technical Reference Manual (www.arm.com).

Note: Interrupts must be globally enabled using the __enable_irq() primitive before any interrupts will fire.

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