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32-bit ARM® Cortex®-M4F MCUs with 1 Msps 12-bit ADC, QSPI, USB, Ethernet, and PTC
Features
1 Configuration Summary
2 Ordering Information
3 Block Diagram
3.1 SAM D5x/E5x Block Diagram
4 Pinout
4.1 48-Pin VQFN Package
4.2 64-Pin TQFP and VQFN Package
4.3 64-Pin WLCSP Package
4.4 100-Pin TQFP Package
4.5 120-ball TFBGA Package
4.6 128-Pin TQFP Package
5 Signal Descriptions List
6 I/O Multiplexing and Considerations
6.1 Multiplexed Signals
6.2 Other Functions
7 Power Supply and Start-Up Considerations
7.1 Power Domain Overview
7.2 Power Supply Considerations
7.3 Power-Up
7.4 Power-On Reset and Brown-Out Detector
8 Product Memory Mapping Overview
9 Memories
9.1 Embedded Memories
9.2 Physical Memory Map
9.3 SRAM Memory Configuration
9.4 NVM User Row Mapping (UROW)
9.5 NVM Software Calibration Area Mapping (SW0)
9.6 Serial Number
10 Processor and Architecture
10.1 Cortex M4 Processor
10.2 Nested Vector Interrupt Controller
10.3 High-Speed Bus System
11 CMCC - Cortex M Cache Controller
11.1 Overview
11.2 Features
11.3 Block Diagram
11.4 Signal Description
11.5 Product Dependencies
11.6 Functional Description
11.7 DEBUG Mode
11.8 RAM Properties
11.9 Register Summary
11.10 Register Description
12 DSU - Device Service Unit
12.1 Overview
12.2 Features
12.3 Block Diagram
12.4 Signal Description
12.5 Product Dependencies
12.6 Debug Operation
12.7 Chip Erase
12.8 Programming
12.9 Intellectual Property Protection
12.10 Device Identification
12.11 Functional Description
12.12 Register Summary
12.13 Register Description
13 Clock System
13.1 Clock Distribution
13.2 Synchronous and Asynchronous Clocks
13.3 Register Synchronization
13.4 Enabling a Peripheral
13.5 On Demand Clock Requests
13.6 Power Consumption vs. Speed
13.7 Clocks after Reset
14 GCLK - Generic Clock Controller
14.1 Overview
14.2 Features
14.3 Block Diagram
14.4 Signal Description
14.5 Product Dependencies
14.6 Functional Description
14.7 Register Summary
14.8 Register Description
15 MCLK – Main Clock
15.1 Overview
15.2 Features
15.3 Block Diagram
15.4 Signal Description
15.5 Product Dependencies
15.6 Functional Description
15.7 Register Summary
15.8 Register Description
16 RSTC – Reset Controller
16.1 Overview
16.2 Features
16.3 Block Diagram
16.4 Signal Description
16.5 Product Dependencies
16.6 Functional Description
16.7 Register Summary
16.8 Register Description
17 RAMECC – RAM Error Correction Code (ECC)
17.1 Overview
17.2 Features
17.3 Block Diagram
17.4 Signal Description
17.5 Product Dependencies
17.6 Functional Description
17.7 Register Summary
17.8 Register Description
18 PM – Power Manager
18.1 Overview
18.2 Features
18.3 Block Diagram
18.4 Signal Description
18.5 Product Dependencies
18.6 Functional Description
18.7 Register Summary
18.8 Register Description
19 SUPC – Supply Controller
19.1 Overview
19.2 Features
19.3 Block Diagram
19.4 Signal Description
19.5 Product Dependencies
19.6 Functional Description
19.7 Register Summary
19.8 Register Description
20 WDT – Watchdog Timer
20.1 Overview
20.2 Features
20.3 Block Diagram
20.4 Signal Description
20.5 Product Dependencies
20.6 Functional Description
20.7 Register Summary
20.8 Register Description
21 RTC – Real-Time Counter
21.1 Overview
21.2 Features
21.3 Block Diagram
21.4 Signal Description
21.5 Product Dependencies
21.6 Functional Description
21.7 Register Summary - Mode 0 - 32-Bit Counter
21.8 Register Description - Mode 0 - 32-Bit Counter
21.9 Register Summary - Mode 1 - 16-Bit Counter
21.10 Register Description - Mode 1 - 16-Bit Counter
21.11 Register Summary - Mode 2 - Clock/Calendar
21.12 Register Description - Mode 2 - Clock/Calendar
22 DMAC – Direct Memory Access Controller
22.1 Overview
22.2 Features
22.3 Block Diagram
22.4 Signal Description
22.5 Product Dependencies
22.6 Functional Description
22.7 Register Summary
22.8 Register Description
22.9 Register Summary - SRAM
22.10 Register Description - SRAM
23 EIC – External Interrupt Controller
23.1 Overview
23.2 Features
23.3 Block Diagram
23.4 Signal Description
23.5 Product Dependencies
23.6 Functional Description
23.7 Register Summary
23.8 Register Description
24 GMAC - Ethernet MAC
24.1 Description
24.2 Features
24.3 Block Diagram
24.4 Signal Description
24.5 Product Dependencies
24.6 Functional Description
24.7 Programming Interface
24.8 Register Summary
24.9 Register Description
25 NVMCTRL – Nonvolatile Memory Controller
25.1 Overview
25.2 Features
25.3 Block Diagram
25.4 Signal Description
25.5 Product Dependencies
25.6 Functional Description
25.7 Register Summary
25.8 Register Description
26 ICM - Integrity Check Monitor
26.1 Overview
26.2 Features
26.3 Block Diagram
26.4 Signal Description
26.5 Product Dependencies
26.6 Functional Description
26.7 Register Summary - ICM
26.8 Register Description
27 PAC - Peripheral Access Controller
27.1 Overview
27.2 Features
27.3 Block Diagram
27.4 Product Dependencies
27.5 Functional Description
27.6 Register Summary
27.7 Register Description
28 OSCCTRL – Oscillators Controller
28.1 Overview
28.2 Features
28.3 Block Diagram
28.4 Signal Description
28.5 Product Dependencies
28.6 Functional Description
28.7 Register Summary
28.8 Register Description
29 OSC32KCTRL – 32KHz Oscillators Controller
29.1 Overview
29.2 Features
29.3 Block Diagram
29.4 Signal Description
29.5 Product Dependencies
29.6 Functional Description
29.7 Register Summary
29.8 Register Description
30 FREQM – Frequency Meter
30.1 Overview
30.2 Features
30.3 Block Diagram
30.4 Signal Description
30.5 Product Dependencies
30.6 Functional Description
30.7 Register Summary
30.8 Register Description
31 Event System (EVSYS)
31.1 Overview
31.2 Features
31.3 Block Diagram
31.4 Product Dependencies
31.5 Functional Description
31.6 Register Summary
31.7 Register Description
32 PORT - I/O Pin Controller
32.1 Overview
32.2 Features
32.3 Block Diagram
32.4 Signal Description
32.5 Product Dependencies
32.6 Functional Description
32.7 Register Summary
32.8 Register Description
33 SERCOM – Serial Communication Interface
33.1 Overview
33.2 Features
33.3 Block Diagram
33.4 Signal Description
33.5 Product Dependencies
33.6 Functional Description
34 SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter
34.1 Overview
34.2 USART Features
34.3 Block Diagram
34.4 Signal Description
34.5 Product Dependencies
34.6 Functional Description
34.7 Register Summary
34.8 Register Description
35 SERCOM SPI – SERCOM Serial Peripheral Interface
35.1 Overview
35.2 Features
35.3 Block Diagram
35.4 Signal Description
35.5 Product Dependencies
35.6 Functional Description
35.7 Register Summary
35.8 Register Description
36 SERCOM I2C – Inter-Integrated Circuit
36.1 Overview
36.2 Features
36.3 Block Diagram
36.4 Signal Description
36.5 Product Dependencies
36.6 Functional Description
36.7 Register Summary - I2C Client
36.8 Register Description - I2C Client
36.9 Register Summary - I2C Host
36.10 Register Description - I2C Host
37 QSPI - Quad Serial Peripheral Interface
37.1 Overview
37.2 Features
37.3 Block Diagram
37.4 Signal Description
37.5 Product Dependencies
37.6 Functional Description
37.7 Register Summary
37.8 Register Description
38 USB – Universal Serial Bus
38.1 Overview
38.2 Features
38.3 USB Block Diagram
38.4 Signal Description
38.5 Product Dependencies
38.6 Functional Description
38.7 Common Device / Host Register Summary
38.8 General Device Register Summary
38.9 Device Endpoint n Register Summary
38.10 Endpoint Descriptors Structure
38.11 Device Endpoint n Descriptor Bank 0/1
38.12 General Host Register Summary
38.13 Host Pipe n Register Summary
38.14 Pipe Descriptors Structure
38.15 Host Pipe n Descriptor Bank 0 / 1
39 CAN - Control Area Network
39.1 Overview
39.2 Features
39.3 Block Diagram
39.4 Signal Description
39.5 Product Dependencies
39.6 Functional Description
39.7 Register Summary
39.8 Register Description
39.9 Message RAM
40 SD/MMC Host Controller (SDHC)
40.1 Overview
40.2 Features
40.3 Block Diagrams
40.4 Signal Description
40.5 Product Dependencies
40.6 Functional Description
40.7 Register Summary
40.8 Register Description
41 Configurable Custom Logic (CCL)
41.1 Overview
41.2 Features
41.3 Block Diagram
41.4 Signal Description
41.5 Product Dependencies
41.6 Functional Description
41.7 Register Summary
41.8 Register Description
42 AES – Advanced Encryption Standard
42.1 Overview
42.2 Features
42.3 Block Diagram
42.4 Signal Description
42.5 Product Dependencies
42.6 Functional Description
42.7 Register Summary
42.8 Register Description
43 Public Key Cryptography Controller (PUKCC)
43.1 Overview
43.2 Product Dependencies
43.3 Functional Description
44 TRNG – True Random Number Generator
44.1 Overview
44.2 Features
44.3 Block Diagram
44.4 Signal Description
44.5 Product Dependencies
44.6 Functional Description
44.7 Register Summary
44.8 Register Description
45 ADC – Analog-to-Digital Converter
45.1 Overview
45.2 Features
45.3 Block Diagram
45.4 Signal Description
45.5 Product Dependencies
45.6 Functional Description
45.7 Register Summary
45.8 Register Description
46 AC – Analog Comparators
46.1 Overview
46.2 Features
46.3 Block Diagram
46.4 Signal Description
46.5 Product Dependencies
46.6 Functional Description
46.7 Register Summary
46.8 Register Description
47 DAC – Digital-to-Analog Converter
47.1 Overview
47.2 Features
47.3 Block Diagram
47.4 Signal Description
47.5 Product Dependencies
47.6 Functional Description
47.7 Register Summary
47.8 Register Description
48 Timer/Counter (TC)
48.1 Overview
48.2 Features
48.3 Block Diagram
48.4 Signal Description
48.5 Product Dependencies
48.6 Functional Description
48.7 Register Description
49 TCC – Timer/Counter for Control Applications
49.1 Overview
49.2 Features
49.3 Block Diagram
49.4 Signal Description
49.5 Product Dependencies
49.6 Functional Description
49.7 Register Summary
49.8 Register Description
50 PTC - Peripheral Touch Controller
50.1 Overview
50.2 Features
50.3 Block Diagram
50.4 Signal Description
50.5 System Dependencies
50.6 Functional Description
51 Inter-IC (I2 S) Sound Controller
51.1 Overview
51.2 Features
51.3 Block Diagram
51.4 Signal Description
51.5 Product Dependencies
51.6 Functional Description
51.7 I2S Application Examples
51.8 Register Summary
51.9 Register Description
52 PCC - Parallel Capture Controller
52.1 Overview
52.2 Features
52.3 Block Diagram
52.4 Signal Description
52.5 Product Dependencies
52.6 Functional Description
52.7 Register Summary
52.8 Register Description
53 PDEC – Position Decoder
53.1 Overview
53.2 Features
53.3 Block Diagram
53.4 Signal Description
53.5 Product Dependencies
53.6 Functional Description
53.7 Register Summary
53.8 Register Description
54 Electrical Characteristics at 85°C
54.1 Disclaimer
54.2 Absolute Maximum Ratings
54.3 General Operating Ratings
54.4 Injection Current
54.5 Supply Characteristics
54.6 Maximum Clock Frequencies
54.7 Power Consumption
54.8 Wake-Up Time
54.9 I/O Pin Characteristics
54.10 Analog Characteristics
54.11 PTC Characteristics
54.12 NVM Characteristics
54.13 Oscillators Characteristics
54.14 Timing Characteristics
54.15 USB Characteristics
55 Electrical Characteristics at 105°C
55.1 General Operating Ratings (105°C)
55.2 Power Consumption (105°C)
55.3 Analog Characteristics (105°C)
55.4 NVM Characteristics
55.5 Oscillators Characteristics (105°C)
56 Electrical Characteristics at 125°C
56.1 General Operating Ratings (125°C)
56.2 Injection Current (125°C)
56.3 Maximum Clock Frequencies (125°C)
56.4 Power Consumption (125°C)
56.5 Analog Characteristics (125°C)
56.6 NVM Characteristics (125°C)
56.7 Oscillators Characteristics (125°C)
56.8 Timing Characteristics (125°C)
57 AEC Q-100 Grade 1, 125°C Electrical Characteristics
58 Appendix A
59 Packaging Information
59.1 Package Marking Information
59.2 Thermal Considerations
59.3 Package Drawings
59.4 Soldering Profile
60 Schematic Checklist
60.1 Introduction
60.2 Power Supply
60.3 External Analog Reference Connections
60.4 External Reset Circuit
60.5 Unused or Unconnected Pins
60.6 Clocks and Crystal Oscillators
60.7 Programming and Debug Ports
60.8 QSPI Interface
60.9 USB Interface
60.10 SDHC Interface
61 Conventions
61.1 Numerical Notation
61.2 Memory Size and Type
61.3 Frequency and Time
61.4 Registers and Bits
62 Acronyms and Abbreviations
63 Revision History
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