Asynchronous (with Clock
Reconstruction) or Synchronous Operation
Internal or External Clock source for
Asynchronous and Synchronous Operation
Baud-rate Generator
Supports Serial Frames with 5, 6, 7, 8
or 9 Data bits and 1 or 2 Stop bits
Odd or Even Parity Generation and
Parity Check
Selectable LSB- or MSB-first Data
Transfer
Buffer Overflow and Frame Error
Detection
Noise Filtering, Including False Start
bit Detection and Digital Low-pass Filter
Collision Detection
Can Operate in all Sleep modes
Operation at Speeds up to Half the
System Clock for Internally Generated Clocks
Operation at Speeds up to the System
Clock for Externally Generated Clocks
RTS and CTS Flow Control
IrDA Modulation and Demodulation up to
115.2kbps
LIN Host
Support
LIN Client
Support
Auto-baud and break character
detection
ISO 7816 T=0 or T=1 protocols for Smart Card Interfacing
RS485 Support
Start-of-frame
detection
Two-Level Receive Buffer
Can work with DMA
32-bit Extension for Better System Bus
Utilization
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
