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32-bit ARM® Cortex®-M4F MCUs with 1 Msps 12-bit ADC, QSPI, USB, Ethernet, and PTC
32-bit ARM® Cortex®-M4F MCUs with 1 Msps 12-bit ADC, QSPI, USB, Ethernet, and PTC
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ATSAMD51G18A ATSAMD51G19A ATSAMD51J18A ATSAMD51J19A ATSAMD51J20A ATSAMD51N19A ATSAMD51N20A ATSAMD51P19A ATSAMD51P20A ATSAME51G18A ATSAME51G19A ATSAME51J18A ATSAME51J19A ATSAME51J20A ATSAME51N19A ATSAME51N20A ATSAME53J18A ATSAME53J19A ATSAME53J20A ATSAME53N19A ATSAME53N20A ATSAME54N19A ATSAME54N20A ATSAME54P19A ATSAME54P20A
  1. Home
  2. 36 SERCOM I2C – Inter-Integrated Circuit
  3. 36.6 Functional Description
  4. 36.6.2 Basic Operation
  5. 36.6.2.4 I2C Host Operation
  6. 36.6.2.4.1 Host Clock Generation

  • Features
  • 1 Configuration Summary
  • 2 Ordering Information
  • 3 Block Diagram
  • 4 Pinout
  • 5 Signal Descriptions List
  • 6 I/O Multiplexing and Considerations
  • 7 Power Supply and Start-Up Considerations
  • 8 Product Memory Mapping Overview
  • 9 Memories
  • 10 Processor and Architecture
  • 11 CMCC - Cortex M Cache Controller
  • 12 DSU - Device Service Unit
  • 13 Clock System
  • 14 GCLK - Generic Clock Controller

  • 15 MCLK – Main Clock
  • 16 RSTC – Reset Controller
  • 17 RAMECC – RAM Error Correction Code (ECC)
  • 18 PM – Power Manager
  • 19 SUPC – Supply Controller
  • 20 WDT – Watchdog Timer
  • 21 RTC – Real-Time Counter
  • 22 DMAC – Direct Memory Access Controller
  • 23 EIC – External Interrupt Controller
  • 24 GMAC - Ethernet MAC
  • 25 NVMCTRL – Nonvolatile Memory Controller
  • 26 ICM - Integrity Check Monitor
  • 27 PAC - Peripheral Access Controller
  • 28 OSCCTRL – Oscillators Controller
  • 29 OSC32KCTRL – 32KHz Oscillators Controller
  • 30 FREQM – Frequency Meter
  • 31 Event System (EVSYS)
  • 32 PORT - I/O Pin Controller
  • 33 SERCOM – Serial Communication Interface
  • 34 SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter
  • 35 SERCOM SPI – SERCOM Serial Peripheral Interface
  • 36 SERCOM I2C – Inter-Integrated Circuit
    • 36.1 Overview
    • 36.2 Features
    • 36.3 Block Diagram
    • 36.4 Signal Description
    • 36.5 Product Dependencies
    • 36.6 Functional Description
      • 36.6.1 Principle of Operation
      • 36.6.2 Basic Operation
        • 36.6.2.1 Initialization
        • 36.6.2.2 Enabling, Disabling, and Resetting
        • 36.6.2.3 I2C Bus State Logic
        • 36.6.2.4 I2C Host Operation
          • 36.6.2.4.1 Host Clock Generation
            • 36.6.2.4.1.1 Clock Generation (Standard-Mode, Fast-Mode, and Fast-Mode Plus)
            • 36.6.2.4.1.2 Host Clock Generation (High-Speed Mode)
          • 36.6.2.4.2 Transmitting Address Packets
          • 36.6.2.4.3 Transmitting Data Packets
          • 36.6.2.4.4 Receiving Data Packets (SCLSM=0)
          • 36.6.2.4.5 Receiving Data Packets (SCLSM=1)
          • 36.6.2.4.6 High-Speed Mode
          • 36.6.2.4.7 10-Bit Addressing
        • 36.6.2.5 I2C Client Operation
      • 36.6.3 Additional Features
      • 36.6.4 DMA, Interrupts and Events
      • 36.6.5 Sleep Mode Operation
      • 36.6.6 Synchronization
    • 36.7 Register Summary - I2C Client
    • 36.8 Register Description - I2C Client
    • 36.9 Register Summary - I2C Host
    • 36.10 Register Description - I2C Host
  • 37 QSPI - Quad Serial Peripheral Interface
  • 38 USB – Universal Serial Bus
  • 39 CAN - Control Area Network
  • 40 SD/MMC Host Controller (SDHC)
  • 41 Configurable Custom Logic (CCL)
  • 42 AES – Advanced Encryption Standard
  • 43 Public Key Cryptography Controller (PUKCC)
  • 44 TRNG – True Random Number Generator
  • 45 ADC – Analog-to-Digital Converter
  • 46 AC – Analog Comparators
  • 47 DAC – Digital-to-Analog Converter
  • 48 Timer/Counter (TC)
  • 49 TCC – Timer/Counter for Control Applications
  • 50 PTC - Peripheral Touch Controller
  • 51 Inter-IC (I2 S) Sound Controller
  • 52 PCC - Parallel Capture Controller
  • 53 PDEC – Position Decoder
  • 54 Electrical Characteristics at 85°C
  • 55 Electrical Characteristics at 105°C
  • 56 Electrical Characteristics at 125°C
  • 57 AEC Q-100 Grade 1, 125°C Electrical Characteristics
  • 58 Appendix A
  • 59 Packaging Information
  • 60 Schematic Checklist
  • 61 Conventions
  • 62 Acronyms and Abbreviations
  • 63 Revision History
  • The Microchip Website
  • Product Change Notification Service
  • Customer Support
  • Product Identification System
  • Microchip Devices Code Protection Feature
  • Legal Notice
  • Trademarks
  • Quality Management System
  • Worldwide Sales and Service

36.6.2.4.1 Host Clock Generation

The SERCOM peripheral supports several I2C bidirectional modes:
  • Standard mode (Sm) up to 100 kHz
  • Fast mode (Fm) up to 400 kHz
  • Fast mode Plus (Fm+) up to 1 MHz
  • High-speed mode (Hs) up to 3.4 MHz
The Host clock configuration for Sm, Fm, and Fm+ are described in Clock Generation (Standard-Mode, Fast-Mode, and Fast-Mode Plus). For Hs, refer to Host Clock Generation (High-Speed Mode).

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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