14.4 Signal Description
| Signal Name | Type | Description |
|---|---|---|
| GCLK_IO[7:0] | Digital I/O |
Clock source for Generators when input Generic Clock signal when output |
Note: One signal can be mapped on several pins.
| Signal Name | Type | Description |
|---|---|---|
| GCLK_IO[7:0] | Digital I/O |
Clock source for Generators when input Generic Clock signal when output |
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