52.2 Features

• One clock, up to 14-bit parallel data and two Data Enable on I/O lines
• Data can be sampled every other time (e.g. for chrominance sampling)
• Supports connection of the DMAC which offers buffer reception without processor intervention
• Auto-scale feature available when 10, 12 or 14 bits data size is selected.
• Can be used to interface a CMOS Digital Image Sensor, an ADC, etc.