28.2 Features

  • Digital Frequency-Locked Loop (DFLL48M)
    • Internal oscillator with no external components
    • 48 MHz output frequency
    • Operates stand-alone as a high-frequency programmable oscillator in Open Loop mode
    • Operates as an accurate frequency multiplier against a known frequency in Closed Loop mode
  • Two 8-48 MHz Crystal Oscillators (XOSCn)
    • Tunable gain control
    • Programmable start-up time
    • Crystal or external input clock on XIN I/O
    • Clock failure detection with safe clock switch
    • Clock failure event output
  • Two Digital Phase-Locked Loop (FDPLL200Mn)
    • 96 MHz to 200 MHz output frequency from a 32 kHz to 3.2 MHz reference clock
    • Two DPLLs, each with four selectable reference clocks
    • Adjustable digital filter for jitter optimization
    • Adjustable DCO filter for a 4-stages differential ring oscillator
    • Fractional part used to achieve 1/32th of reference clock step
    • Embedded test mode controller