3.2.5.1 Developing with Features that Require UCB Erase/Write-Protect Enabled

Some features on the dsPIC33A products require UCB Write-Protect or UCB Erase-Protect to be enabled before they operate. For example, when a device is configured in Dual-Partition mode and issues an inactive-partition erase, IRT and OTP Flash protection regions in the inactive partition are erased unless UCB Erase-Protect or UCB Write-Protect is enabled. This would complicate developing dual-partition based secure firmware update solutions difficult. Developers need to test the operation of their code, including inactive-partition erase, and have the device perform as if these options were set. Setting these options, however, would lock the Flash protections regions settings, IRT and OTP sections from all future chip erase operations.

During development, the EPUCB (UCPROT[0]) or WPUCB (UCPROT[1]) bit can be used to enable the UCB Erase/Write-Protect features in software rather than through the configuration registers. This allows the device to operate in the same mode as if these settings were permanently locked but allow the device to still be chip erased for development purposes. These bits are cleared on Reset, set on Reset via the FEPUCB and FWPCUB configuration bits, respectively, and can only be set by firmware (not cleared).

Temporarily Enabling UCB Erase/Write-Protect

UCPROTbits.EPUCB = 1; //Enable UCB Erase-Protect
UCPROTbits.WPUCB = 1; //Enable UCB Write-Protect

Note: This method should be used to lock the UCB for development only and not in production. Failure to enable the FEPUCB and/or FWPCUB configuration bits will allow the device to be chip erased, including IRT or OTP sections. After development is complete, the FEPUCB and FWPCUB configuration bits should be set.