Address Buffer Registers

The I²C module has two Address Buffer registers, I2CxADB0 and I2CxADB1. The Address Buffer registers are enabled via the Address Buffer Disable (ABD) bit. When ABD is clear, the Address Buffer registers are enabled; when the ABD is set, the Address Buffer registers are disabled. This differs from the MSSP module in that the MSSP module only used the SSPxBUF to receive or transmit an address (or data).

When the Address Buffer registers are enabled (ABD = 0) in 7-bit Client mode, a received matching address (including the R/W bit information) is loaded into I2CxADB0. The I2CxADB1 register is not used in 7-bit Client mode. When ABD = 1, the received matching address is loaded into the I2C Receive Buffer (I2CxRXB) register.

When the Address Buffer registers are enabled (ABD = 0) in 10-bit Client mode, I2CxADB0 is loaded with the lower eight bits of the matching received address, while I2CxADB1 is loaded with the upper eight bits of the matching received address, including the R/W bit. When ABD = 1, the upper eight bits of the matching address (including R/W bit information) are loaded into I2CxRXB. After the client reads the address (clearing I2CxRXB), the matching received lower address is loaded into I2CxRXB.

In 7-bit Host mode, I2CxADB1 is used to store a client address, while I2CxADB0 is unused. When the Address Buffer registers are enabled (ABD = 0), the address loaded into I2CxADB1 is copied into the Transmit Shift register automatically by the hardware. Conversely, when the address buffers are disabled (ABD = 1), neither I2CxADB0 nor I2CxADB1 are used, and the client address is loaded into the I2CxTXB register by user software.

In 10-bit Host mode, I2CxADB0 is used to store the lower eight bits of the client address, while I2CxADB1 is used to store the upper bits and R/W value of the client address. When the Address Buffer registers are enabled (ABD = 0), the upper byte of the 10-bit address (loaded into I2CxADB1) is copied into the Transmit Shift register automatically by module hardware. Once the host receives the Acknowledge Sequence (ACK) from the client, the lower byte of the 10-bit address (located in I2CxADB0) is copied into the Transmit Shift register automatically by module hardware.

In Multi-Host mode, only 7-bit addresses are used. When ABD = 0 and the device is addressed as a client, the received matching client address is copied into the I2CxADB0 register. If the device is communicating as a host, the contents of the I2CxADB1 register are copied into the Transmit Shift register and transmitted on the bus. When ABD = 1 and the device is addressed as a client, the matching received address is loaded into I2CxRXB. If the device is communicating as a host, user software must load I2CxTXB with the client address.

In addition to the two Address Buffer registers, the I²C module dedicates four Client-mode address registers: I2CxADR0/1/2/3. These registers hold up to four independent client addresses. These Client-mode registers are active regardless of the ABD bit configuration.

In 7-bit Client mode, the first byte received after a Start or Restart condition is compared independently to the values loaded in all four address registers. If the received byte matches a value in one of the registers, module hardware copies the matching address into either I2CxADB0 (when ABD = 0) or I2CxRXB (when ABD = 1), and the Client Mode Active (SMA) and Address Interrupt Flag (ADRIF) bits are set. If the received byte does not match, the module remains idle.

In 7-bit Client mode with Address Masking, the I2CxADR0 and I2CxADR2 registers are loaded with client addresses, while the I2CxADR1 and I2CxADR3 registers are loaded with mask values. The I2CxADR1 value is used to mask the client address in I2CxADR0, while the I2CxADR3 value is used to mask the client address in I2CxADR2. This allows for full 7-bit address masking for up to two client addresses.

In 10-bit Client mode, I2CxADR0 and I2CxADR1 are combined to store a 10-bit client address, as are I2CxADR2 and I2CxADR3. The first byte (10-bit high-address byte) received after a Start or Restart condition is compared to the values stored in I2CxADR1 and I2CxADR3, which hold the upper byte of the 10-bit address. If there is an address match, the address is copied into either the I2CxADB1 register (when ABD = 0) or I2CxRXB (when ABD = 1), and the client issues an ACK. The second received byte (10-bit low-address byte) is then compared to the values in I2CxADR0 and I2CxADR2, which hold the lower byte of the 10-bit address. If the low-address matches, it is copied into either I2CxADB0 (when ABD = 0) or I2CxRXB (when ABD = 1), and the SMA and ADRIF bits are set. If neither the upper nor lower address bytes match the values in the I2CxADR0/1 or I2CxADR2/3, the module remains idle.

In 10-bit Client mode with Address Masking, the I2CxADR0 and I2CxADR1 registers are combined to store the 10-bit client address, while the I2CxADR2 and I2CxADR3 registers are combined to hold the 10-bit mask value. The received upper and lower address bytes are compared to the masked upper and lower address bytes. If a match occurs, the upper and lower address bytes are loaded into either I2CxADB1 and I2CxADB0, respectively (when ABD = 0), or I2CxRXB (ABD = 1).