8 Appendix 2: User Cryptoprocessor Simulation

Microchip Libero SoC provides a PLI simulation library for the User Cryptoprocessor to show the functional behavior of the User Cryptoprocessor. The user Cryptoprocessor Simulation library is a model that depicts the user Cryptoprocessor's functional behavior, and it is not cycle accurate as real hardware.

The PLI library for User Cryptoprocessor is available at <Libero_Installation_Directory>/Designer/lib/modelsimpro/pli. The PLI library must be passed to the ModelSim, using the VSIM command, for User Cryptoprocessor simulation. The VSIM command can be set in Libero Project settings under Simulation options.

  • VSIM command for Windows:
    -pli <$Libero_Installation_Directory>/Designer/lib/modelsimpro/pli/pf_crypto_win_me_pli.dll
  • VSIM command for Linux®:
    -pli <$Libero_Installation_Directory>/Designer/lib/modelsimpro/pli/pf_crypto_lin_me_pli.so

Edit <Libero_Installation_Directory> to match the location of Libero SoC on the host PC.

The Libero installation folder is C:/Microchip/Libero_SoC_v2024.2, as shown in the following figure.

Figure 8-1. Libero Project settings—VSIM Command for User Cryptoprocessor Simulation

The simulation steps are as follows:

  1. Generate the top-level component which includes the Mi-V processor system with PF_CRYPTO core in it.
  2. Build a Mi-V application with required User Cryptoprocessor functions. User Cryptoprocessor functions are accessible through Athena TeraFire CAL driver. Subsequently, create an application image or hex file and import it into the system memory (LSRAM).
  3. Create a testbench for the complete processor system.
  4. To execute the imported application image, simulate the complete processor system. You can observe that the Mi-V processor sends the commands and data to the User Cryptoprocessor, and the User Cryptoprocessor responds with the result.
    Important: The preceding reference design uses UART interface as user interface to supply the test vectors and observe the results. To simulate the design, customers can integrate an UART TX and RX testbench with the given test vectors, by following the preceding steps.